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Noise Theory of Linear and Nonlinear Circuits
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u/mantrap2 ยท 4 pointsr/rfelectronics

Usually you can worry primarily about thermal noise in RF and subsume other noise sources into component specs as "noise figure".

Thermal noise dominates non-semiconductor noise at RF frequencies.

Semiconductors are all these other noise sources but in practice you subsume them into NF. NF is empirically measured for a given amplifier or component. So you pull it off of a data sheet most often.

There are some issues with that because many of these other noise sources are current or voltage dependent in magnitude so it's important to define/use a constant bias on the semiconductor when you measure NF.

The last issue, which does bite you in RF perversely is 1/f noise. 1/f noise only occurs in semiconductor devices at frequencies below 1 MHz and often only below 1 KHz. The characteristic on a Lin-Log spectrum is a straight line with -1 slope or f(^-1) or 1/f. There are other types of noise that have other exponents as well but 1/f is one of the dominant ones.

So how does a low frequency noise phenomena become an RF problem? Oscillators. Both fixed oscillators and especially VCOs as used in PLLs. Because 1/f is "low frequency DC", things like semiconductor bias point and VCO offset always have a 1/f noise component and that cause the RF frequency out of the oscillator to have a "skirt" that is known as "phase noise". Phase noise typically defines numerous RF design spec limitations from carrier accuracy to channel spacing to data rate.

Programs like SPICE do solve noise (using the .NOISE command) as primarily thermal noise (newer semiconductor models do shot and other noise types). SPICE does this for every resistor in the circuit, both user defined and linearized component defined (semiconductors) had a series a noise voltage source (making every resistor a Thevenin).

This done by solving the large signal bias point, solving the parameters of the hybrid pi models of all semiconductors and then setting user defined signal inputs to zero and only having voltage noise sources in the circuit and solving for noise voltages and currents through out.

This is NOT hand-calculation viable but only computer-only viable as circuit analysis. Your transistor SPICE models must support noise parameters as does your SPICE simulator (all do thermal noise but not all do other types - remember the voltage/current dependencies of many of these - it's a bookkeeping mess only a computer does well).

Usually you get SPICE models with noise parameters from the transistor vendor. The transistor vendor measures the noise empirically to generate the SPICE parameters. They do that by buying test systems like my company makes. It's not cheap - typically $100K-$500K worth of capital investment.

For hand solution you usually do NOT do transistor-level solutions but instead do a system flow diagram level of noise-by-stage in the signal path using Noise Figure which has all those kinds of noise bundled in.

If you are crazy like I am and want to dig deeper into the various types of noise seen in semiconductor:

http://www.eng.auburn.edu/~wilambm/pap/2011/K10147_C011.pdf

The general rule of thumb: noise comes from material boundaries and their imperfections. The specific physics due to that cause each type (or don't - it becomes semiconductor device design specific).

I don't have this book but it looks relevant to your question ($$$$$):

https://www.amazon.com/Noise-Theory-Linear-Nonlinear-Circuits/dp/047194825X